Hardware Engineering Manager


Thousand Oaks
Permanent
Negotiable
Engineering
PR/580362_1771446953
Hardware Engineering Manager

My Client is seeking a strategic, technically strong senior leader to drive the development and execution of advanced semiconductor test platform programs. This role requires deep expertise in test cell architecture, cross‑functional engineering leadership, and a thorough understanding of both wafer‑level and packaged device testing.

What You'll Do

  • Lead test platform programs from concept through deployment, ensuring performance, reliability, and on‑time delivery.
  • Direct and align multidisciplinary engineering teams, including:
    • Mechanical Engineering: enclosure design, thermal management, structural integration
    • Electrical Engineering: PCB design, power delivery, signal integrity
    • Software Engineering: automation frameworks, analytics, UI development
    • Firmware Engineering: embedded systems, instrumentation control
    • Signal Delivery: high‑speed interconnects, probing technologies, test interfaces
  • Oversee full semiconductor test cell integration-handlers, thermal systems, automation, and workflow optimization.
  • Guide platform development for wafer‑level and packaged testing, collaborating with probe card and probing technology partners.
  • Work closely with internal stakeholders and customers to define requirements and ensure successful adoption.
  • Manage schedules, risks, and milestones while mentoring program managers and technical leads.
  • Present regular status updates and strategic recommendations to senior leadership.

What You Bring

  • Bachelor's or Master's in Electrical, Mechanical, or Computer Engineering
  • 10+ years in semiconductor test systems, including 5+ years in leadership
  • Proven success delivering complex, multidisciplinary test platforms
  • Strong understanding of ATE systems, semiconductor manufacturing, and test methodologies
  • Excellent organizational, communication, and strategic planning skills

Preferred Experience

  • Semiconductor test cell architecture and system integration
  • Wafer‑level and packaged device testing, including probe card and socket technologies
  • High‑density interconnects, advanced‑node probing solutions
  • High‑speed signal integrity and interface design
  • Experience working with global teams and external suppliers

FAQs

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